1. Field of the Invention
This invention relates to a process for producing printed circuits. More particularly, the invention relates to a process for producing printed circuits in which the insulating substrate is activated by a dry process and in which electroless plating of the conductive circuit lines is eliminated.
2. Description of the Related Art
During conventional production of multilayer circuit boards, conductors are distributed on several signal planes which are interposed with insulating layers and the necessary number of power planes to form a multilayer circuit board. The multilayer circuit board is subsequently drilled in the desired places and connection to the internal wiring is established through copper plating of the drilled holes. Because of the high wiring density, the materials and processes used to produce multilayer circuit boards must meet very stringent requirements.
Two common techniques for producing multilayer circuit boards are the subtractive and additive methods. Power planes are typically produced by the subtractive method. The starting material in this method is an insulating substrate material, such as glass fiber reinforced with epoxy resin, commonly known as prepreg. A copper layer is laminated to one or both sides of the substrate. In the course of further processing, several such substrates are packaged and through holes are drilled by numerically controlled automatic equipment. A copper base layer is deposited on the hole walls by purely chemical means and then reinforced by electroplating. A photoresist pattern is then photolithographically generated on the surface of the copper-laminated substrates in those areas where the required conductive circuit lines are to be formed. The individual circuit board is then fed through an etch system where the copper layer is etched off in the regions that are not protected by photoresist. After removal of the residual resist, only the circuit lines of the printed circuits are left on the epoxy resin substrate.
The subtractive method has the disadvantage that a relatively thick layer of copper has to be laminated to the insulating substrate, most of the copper layer being removed upon subsequent etching. In addition, substantial undercutting occurs during etching, thereby limiting the conductor width such that those of less than 100 microns cannot be produced by this method.
Signal planes for multilayer circuit boards, requiring increasingly dense printed circuit patterns, are typically produced by the additive method. The additive method is time-consuming, extremely complicated, and includes several wet chemical baths. The additive method will now be described in detail with reference to the left side of the flowchart of FIGS. 2A and 2B.
The starting material for the additive method is again an insulating substrate material, such as prepreg. Layers of copper (totalling approximately 75 microns in thickness) are laminated to both sides of the substrate. Approximately 70 microns of the copper are subsequently removed by a known technique, such as etching. The surfaces of the circuit board are then ground, cleaned, and dried. For increased stability, a negative photoresist is applied and blanket exposed. After registration holes have been punched, through holes are drilled and cleaned. The walls of the drilled holes are then activated with a palladium chloride-tin-(II)-chloride solution, and the negative resist is stripped off. Next, the surfaces of the circuit board are treated with a benzotriazole bonding agent and coated with a layer of negative photoresist which is exposed according to the desired conductive circuit pattern and then developed. The circuit board is thus prepared for deposition of the copper circuit lines.
Copper is deposited on the circuit board by the immersion thereof in a long-life copper bath for about 20 hours. During that time, copper is electrolessly deposited to the desired thickness of approximately 40 microns in the developed circuit line channels on the 5 microns thick copper layer and on the hole walls. After the copper is deposited, a tin coating is applied to the copper circuit lines and the photoresist is stripped off. The thin copper layer is then etched in the regions where there are no tin-coated circuit lines. The protective tin coating is subsequently removed and the manufacturing process terminates with an inspection and an electrical test of the printed circuits.
The above-described additive method has the disadvantage that the hole walls to be copper-plated have to be activated with a palladium chloride-tin-(II)-chloride solution, otherwise no copper would be deposited thereon, thereby resulting in defects in the finished printed circuits. Such wet activation processes are inefficient and pose environmental hazards. Also, through holes cannot be drilled without first applying a photoresist and photolithographically exposing it. In addition, the additive method requires the use of electroless plating techniques. Electroplating cannot be used to deposit the copper because the conductive material deposited on the hole walls during activation is not thick enough to allow for a continuous current adequate for electroplating. The photoresist materials used in additive methods must therefore be resistant to superalkaline electroless plating baths. These requirements are generally satisfied only by photoresists that are soluble in organic solvents, such as chlorinated hydrocarbons, and which are developed and stripped by such solvents. The use of chlorinated hydrocarbons pose another environmental hazard. Electroless plating is also a much slower process than electroplating. Finally, the conductive circuit lines produced by the additive method must be provided with a protective tin coating during etching of the 5 microns copper layer. Otherwise, the circuit lines would also be etched. The provision of the tin coating adds to the cost and complexity of the process.
Another additive process for producing printed circuits is known. Sacrificial copper layers are laminated to both sides of a synthetic resin prepreg substrate, through holes are drilled, and the sacrificial layers are removed by etching. A layer of negative photoresist is then directly laminated to one or both sides of the prepreg, which has been roughened by etching. After a pattern has been generated in the negative photoresist layer, copper is cathode sputtered onto the circuit board, including the surfaces of the through holes, the photoresist channels defining the conductive circuit pattern. The copper sputtered onto the surface of the photoresist is removed by scrubbing. In an electroless bath, copper is then deposited by the additive method on the copper sputtered and remaining in the photoresist channels and on the walls of the through holes. Again, a significant disadvantage is that electroplating is not possible. There is no continuous conductive connection of the sputtered copper once the copper on the photoresist has been removed by scrubbing. Thus, the slower electroless plating technique must be used.
Processes for producing printed circuits which include the deposition of copper by electroplating are known. In one such process for producing printed circuits an adhesive layer is deposited on a roughened, unlaminated insulating substrate. The adhesive layer is activated by treatment with tin and palladium and then a metal coating is formed by the electroless chemical plating of a copper base layer not exceeding 0.5 microns. The copper is deposited on the entire surface, including the walls of any substrate through holes. The copper base layer is then reinforced to approximately 1 to 2 microns by electroplating. After a selective coating is applied, the copper is reinforced by further plating. Known subtractive processes are then used to remove the coating and etch away undesired portions of the copper plating.
In another process for producing printed circuits including the deposition of copper by electroplating, thin copper layers and protective layers are applied to both sides of a thin copper laminate, through holes are then drilled, and copper is deposited on the hole walls by both electroless and electroplating techniques. The protective layers are then mechanically stripped, the desired conductive circuit pattern and the hole walls are reinforced by selective copper plating using electroformed coatings, and the non-reinforced regions of the thin copper layers are removed by etching.
Another known process includes reinforcing a copper layer near through holes, including soldering pads, by electroplating. Again, electroless plating precedes electroplating.
Each of the above processes including electroplating techniques suffers from the disadvantage that electroless copper deposition is required prior to electroplating. Electroless plating is required to establish a conductive layer to which electrodes can be attached for electroplating. Furthermore, the conductive layer must be continuous or a complicated and impractical multiple-electrode arrangement is required to allow for current in the conductive layer wherever electrodeposition is desired. For the purposes of this invention, the elimination of electroless plating shall mean that electroplating be accomplished without such complex electrode arrangements.
One process for producing printed circuit boards without electroless plating is known. According to the process, a conductive seed layer is selectively applied to a substrate by a known technique, such as silkscreening. The seed layer is selectively applied according to the desired conductive circuit pattern. Copper is then electroplated directly upon the seed layer. However, the use of such a process presumes that the conductive circuit pattern, and thus also the seed layer, is continuously connected. However, modern circuit boards often require conductive circuit patterns which are not continuously connected. A multiple-electrode arrangement would be required to accomplish electroplating of such circuit boards. Thus, the need for electroless plating is not necessarily eliminated, as described previously.